Various memory architectures have been proposed for selectively reading and/or writing one or more memory cells in a memory array. Of all of the various memory configurations that have been proposed, however, cross-point memory architectures typically offer one of the most dense memory configurations. However, while cross-point memory architectures may offer a significant density advantage compared to other alternative memory architectures, cross-point memory architectures also present many disadvantages, due primarily to an inherent lack of selectivity within the memory array. This lack of selectivity is attributable, at least in part, to the fact that each memory cell in the cross-point memory array essentially consists of only a nonvolatile memory element, without a local switching element to electrically isolate the individual memory cells from corresponding bit lines and/or word lines in the array.
In order to increase storage density in a cross-point memory array, it is known to stack multiple layers of memory cells on top of one another. For example, the Matrix® 3-D Memory (3DM) product line manufactured by Matrix Semiconductor, Inc., employs standard semiconductor materials and process technology to build circuitry in multiple, active memory layers within a silicon die to provide a high-density, nonvolatile data storage device. However, the Matrix® 3DM is a one-time-programmable (OTP) memory, and is therefore not suitable for most data storage applications which typically require multiple write operations directed to the memory.
There exists a need, therefore, for a memory architecture suitable for use in a cross-point memory array which does not suffer from one or more of the above-noted deficiencies associated with conventional memory architectures.